AD7656BSTZ-1-RL 查看數據表（PDF） - Analog Devices

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AD7656BSTZ-1-RL

250 kSPS, 6-Channel, Simultaneous Sampling, Bipolar, 16-/14-/12-Bit ADC

Analog Devices 

APPLICATION HINTS

LAYOUT

The printed circuit board that houses the AD7656-1/AD7657-1/

AD7658-1 should be designed so that the analog and digital

sections are separated and confined to different areas of the board.

At least one ground plane should be used. It can be common or

split between the digital and analog sections. In the case of the

split plane, the digital and analog ground planes should be

joined in only one place, preferably underneath the AD7656-1/

AD7657-1/AD7658-1, or at least as close as possible to the part.

If the AD7656-1/AD7657-1/AD7658-1 are in a system where

multiple devices require analog-to-digital ground connections,

the connection should still be made at only one point, a star

ground point, which should be established as close as possible to

the AD7656-1/AD7657-1/AD7658-1. Good connections should

be made to the ground plane. Avoid sharing one connection for

multiple ground pins. Individual vias or multiple vias to the

ground plane should be used for each ground pin.

Avoid running digital lines under the devices because doing so

couples noise onto the die. The analog ground plane should be

allowed to run under the AD7656-1/AD7657-1/AD7658-1 to

avoid noise coupling. Fast-switching signals like CONVST or

clocks should be shielded with digital ground to avoid radiating

noise to other sections of the board, and they should never run

near analog signal paths. Crossover of digital and analog signals

should be avoided. Traces on layers in close proximity on the

board should run at right angles to each other to reduce the

effect of feedthrough through the board.

The power supply lines to the AVCC, DVCC, VDRIVE, VDD, and VSS pins

on the AD7656-1/AD7657-1/AD7658-1 should use as large a

trace as possible to provide low impedance paths and reduce the

AD7656-1/AD7657-1/AD7658-1

effect of glitches on the power supply lines. Good connections

should be made between the AD7656-1/AD7657-1/AD7658-1

supply pins and the power tracks on the board; this should involve

the use of a single via or multiple vias for each supply pin.

Good decoupling is also important to lower the supply impedance

presented to the AD7656-1/AD7657-1/AD7658-1 and to reduce

the magnitude of the supply spikes. The decoupling capacitors

should be placed close to, ideally right up against, these pins

and their corresponding ground pins. Additionally, low-ESR

1 μF capacitors should be placed on each of the supply pins, the

REFIN/REFOUT pin, and each REFCAPx pin. Avoid sharing

these capacitors between pins, and use vias to connect the

capacitors to the power and ground planes. In addition, use

wide, short traces between each via and the capacitor pad, or

place the vias adjacent to the capacitor pad to minimize parasitic

inductances. The AD7656-1/AD7657-1/AD7658-1 offer the user

a reduced decoupling solution that is pin and software compatible

with AD7656/AD7657/AD7658. The recommended reduced

decoupling required for AD7656-1/AD7657-1/AD7658-1 is

outlined in Figure 27.

Figure 27 shows an external Schmitt trigger device on the

CONVST A, CONVST B, CONVST C inputs. The Schmitt trigger

can be placed close to the CONVST pins (decoupled to the digital

ground) and is used to eliminate any system noise that couples onto

long CONVST A, CONVST B, CONVST C traces from being

applied to the CONVST pins. The Schmitt trigger offers noise

immunity to any high frequency noise, providing a clean

conversion edge to the AD7656-1/AD7657-1/AD7658-1 device in

cases where there is large system noise capable of coupling onto the

CONVST trace.

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