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EL5411IR-T13 查看數據表(PDF) - Intersil

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EL5411IR-T13 Datasheet PDF : 18 Pages
First Prev 11 12 13 14 15 16 17 18
EL5111, EL5211, EL5411
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY (SINGLE LAYER) TEST BOARD
0.350
0.300 290mW
0.250
0.200
TSOT5
θJA=+345°C/W
0.150
0.100
0.050
0.000
0
25
50 75 85 100 125 150
AMBIENT TEMPERATURE (°C)
FIGURE 33. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY (4-LAYER) TEST BOARD
0.6
0.5 483mW
0.4
TSOT5
θJA=+207°C/W
0.3
0.2
0.1
0.0
0
25
50 75 85 100 125 150
AMBIENT TEMPERATURE (°C)
FIGURE 34. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-3 LOW EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
0.6
0.5 486mW
0.4
0.3
θJA =+H2M06S°OC/PW8
0.2
0.1
0
0
25
50
75 85 100
125
AMBIENT TEMPERATURE (°C)
FIGURE 35. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Unused Amplifiers
It is recommended that any unused amplifiers in a dual and
a quad package be configured as a unity gain follower. The
inverting input should be directly connected to the output
and the non-inverting input tied to the ground plane.
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD
1
0.9 870mW
0.8
0.7
0.6
0.5
θJA =+H11M5S°CO/PW8
0.4
0.3
0.2
0.1
0
0
25
50
75 85 100
125
AMBIENT TEMPERATURE (°C)
FIGURE 36. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
Power Supply Bypassing and Printed Circuit
Board Layout
The EL5111, EL5211, and EL5411 can provide gain at high
frequency. As with any high-frequency device, good printed
circuit board layout is necessary for optimum performance.
Ground plane construction is highly recommended, lead
lengths should be as short as possible and the power supply
pins must be well bypassed to reduce the risk of oscillation.
For normal single supply operation, where the VS- pin is
connected to ground, a 0.1µF ceramic capacitor should be
placed from VS+ to pin to VS- pin. A 4.7µF tantalum
capacitor should then be connected in parallel, placed in the
region of the amplifier. One 4.7µF capacitor may be used for
multiple devices. This same capacitor combination should be
placed at each supply pin to ground if split supplies are to be
used.
13
FN7119.5
January 10, 2007

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