SFP+ Controller with Digital LDD Interface
Block Diagram
VCC
SDA
SCL
VCC
MON1
VCC
VCC
I2C
INTERFACE
EEPROM
256 BYTES
AT A0h
MAIN MEMORY
EEPROM/SRAM
ADC CONFIGURATION/RESULTS,
SYSTEM STATUS/CONTROL BITS,
ALARMS/WARNINGS,
LOOKUP TABLES,
USER MEMORY
9-BIT
DELTA-SIGMA
9-BIT
DELTA-SIGMA
3-WIRE
INTERFACE
MON2
MON3P
MON3N
MON4
TXD
TXF
RSEL
IN1
LOS
TEMPERATURE
SENSOR
13-BIT
ADC
8-BIT
QTs
POWER-ON
ANALOG
INTERRUPT
APC
INTEGRATOR
VCC
CONFIGURABLE
LOGIC
CONFIGURABLE
LOGIC
DS1878
REFIN
DAC1
DAC2
SDAOUT
SCLOUT
CSEL1OUT
CSEL2OUT
TXFOUT
TXDOUT
RSELOUT
LOSOUT
GND
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