DS1100LU-45/TR 查看數據表（PDF） - Maxim Integrated

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DS1100LU-45/TR

3.3V 5-Tap Economy Timing Element (Delay Line)

Maxim Integrated 

DS1100L

NOTES:

1) Initial tolerances are ± with respect to the nominal value at +25°C and VCC = 3.3V for both leading

and trailing edge.

2) Temperature and voltage tolerance is with respect to the nominal delay value over the stated

temperature range, and a supply-voltage range of 3.0V to 3.6V.

3) All tap delays tend to vary unidirectionally with temperature or voltage changes. For example, if TAP

1 slows down, all other taps also slow down; TAP3 can never be faster than TAP2.

4) Intermediate delay values are available on a custom basis. For further information, contact the factory

at custom.oscillators@maxim-ic.com.

5) All voltages are referenced to ground.

6) Measured with outputs open.

7) See Test Conditions section at the end of this data sheet.

8) Frequencies higher than 1MHz result in higher ICC values.

9) At or near maximum frequency the delay accuracy can vary and will be application sensitive (i.e.,

decoupling, layout).

Figure 1. LOGIC DIAGRAM

Figure 2. TIMING DIAGRAM: SILICON DELAY LINE

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