DS1135LZ 查看數據表（PDF） - Dallas Semiconductor -> Maxim Integrated

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DS1135LZ

3V 3-in-1 High-Speed Silicon Delay Line

Dallas Semiconductor -> Maxim Integrated 

LOGIC DIAGRAM Figure 1

IN

TIME DELAY

DS1135-L

OUT

ONE OF THREE

PART NUMBER DELAY TABLE (tPLH , tPHL ) Table 1

TOLERANCE OVER

DELAY PER

INITIAL

TEMP AND VOLTAGE

OUTPUT

TOLERANCE

(Note 2)

PART NUMBER

(ns)

(Note 1)

0°C to +70°C

-40°C to +85°C

DS1135LX-10

10/10/10

±1.0ns

±2.0ns

±3.0ns

DS1135LX-12

12/12/12

±1.0ns

±2.0ns

±3.0ns

DS1135LX-15

15/15/15

±1.0ns

±2.5ns

±4.0ns

DS1135LX-20

20/20/20

±1.0ns

±2.5ns

±4.0ns

DS1135LX-25

25/25/25

±1.5ns

±3.0ns

±5.0ns

DS1135LX-30

30/30/30

±1.5ns

±3.0ns

±5.0ns

NOTES:

1. Nominal conditions are +25°C and VCC = +3.3V.

2. Voltage range of 2.7V to 3.6V.

3. Delay accuracies is for both leading and trailing edges.

4. X in Part number denotes package: U indicates µSOP, Z indicates SO.

TEST SETUP DESCRIPTION

Figure 2 illustrates the hardware configuration used for measuring the timing parameters of the DS1135L.

The input waveform is produced by a precision pulse generator under software control. Time delays are

measured by a time interval counter (20 ps resolution) connected to the output. The DS1135L output taps

are selected and connected to the interval counter by a VHF switch control unit. All measurements are

fully automated with each instrument controlled by the computer over an IEEE 488 bus.

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