DAC8420 查看數據表（PDF） - Analog Devices
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DAC8420 Datasheet PDF : 24 Pages
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DAC8420
Table 6. Control Function Logic Table
CLK1 CS1
LD
CLR CLSEL
NC2
High
High Low High
NC2
High
High Low Low
NC2
High
High ↑
High /Low
↑
Low
High High NC2
Low ↑
High High NC2
High NC (↑)2 ↓
High NC2
High NC2
Low High NC2
NC2
High
High High NC2
Serial Input Shift Register
No change
No change
No change
Shifts register one bit
Shifts register one bit
No change
No change
No change
DAC Register A to DAC Register D
Loads midscale value (0x800)
Loads zero-scale value (0x000)
Latches value
No change
No change
Loads the serial data-word3
Transparent 4
No change
1 CLK and CS are interchangeable.
2 NC = Don’t Care.
3 Returning CS high while CLK is high avoids an additional false clock of serial input data. CLK and CS are interchangeable.
4 Do not clock in serial data while LD is low.
Rev. B | Page 9 of 24
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