CY8C54LP(2014) 查看數據表（PDF） - Cypress Semiconductor
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CY8C54LP Datasheet PDF : 120 Pages
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PSoC® 5LP: CY8C54LP Family
Datasheet
Contents
1. Architectural Overview ..................................................4
2. Pinouts ............................................................................6
3. Pin Descriptions ...........................................................10
4. CPU ................................................................................11
4.1 ARM Cortex-M3 CPU ...........................................11
4.2 Cache Controller ..................................................14
4.3 DMA and PHUB ...................................................14
4.4 Interrupt Controller ...............................................16
5. Memory ..........................................................................18
5.1 Static RAM ...........................................................18
5.2 Flash Program Memory ........................................18
5.3 Flash Security .......................................................18
5.4 EEPROM ..............................................................18
5.5 Nonvolatile Latches (NVLs) ..................................19
5.6 External Memory Interface ...................................20
5.7 Memory Map ........................................................21
6. System Integration .......................................................22
6.1 Clocking System ...................................................22
6.2 Power System ......................................................26
6.3 Reset ....................................................................29
6.4 I/O System and Routing .......................................31
7. Digital Subsystem ........................................................38
7.1 Example Peripherals ............................................38
7.2 Universal Digital Block ..........................................40
7.3 UDB Array Description .........................................43
7.4 DSI Routing Interface Description ........................43
7.5 USB ......................................................................45
7.6 Timers, Counters, and PWMs ..............................45
7.7 I2C ........................................................................46
8. Analog Subsystem .......................................................47
8.1 Analog Routing .....................................................48
8.2 Successive Approximation ADC ...........................50
8.3 Comparators .........................................................50
8.4 Opamps ................................................................52
8.5 Programmable SC/CT Blocks ..............................52
8.6 LCD Direct Drive ..................................................53
8.7 CapSense .............................................................54
8.8 Temp Sensor ........................................................54
8.9 DAC ......................................................................54
8.10 Up/Down Mixer ...................................................55
8.11 Sample and Hold ................................................56
9. Programming, Debug Interfaces, Resources .............56
9.1 JTAG Interface .....................................................57
9.2 SWD Interface ......................................................58
9.3 Debug Features ....................................................59
9.4 Trace Features .....................................................59
9.5 SWV and TRACEPORT Interfaces ......................59
9.6 Programming Features .........................................59
9.7 Device Security ....................................................59
10. Development Support ................................................60
10.1 Documentation ...................................................60
10.2 Online .................................................................60
10.3 Tools ...................................................................60
11. Electrical Specifications ............................................61
11.1 Absolute Maximum Ratings ................................61
11.2 Device Level Specifications ................................62
11.3 Power Regulators ...............................................65
11.4 Inputs and Outputs .............................................68
11.5 Analog Peripherals .............................................76
11.6 Digital Peripherals ..............................................94
11.7 Memory ..............................................................98
11.8 PSoC System Resources .................................102
11.9 Clocking ............................................................105
12. Ordering Information ................................................109
12.1 Part Numbering Conventions ...........................110
13. Packaging ..................................................................111
14. Acronyms ..................................................................113
15. Reference Documents ..............................................114
16. Document Conventions ...........................................115
16.1 Units of Measure ..............................................115
Appendix: CSP Package Summary............................... 116
17. Revision History .......................................................119
18. Sales, Solutions, and Legal Information ................120
Document Number: 001-84934 Rev. *E
Page 3 of 120
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