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CY8C27666-SPSXET 查看數據表(PDF) - Cypress Semiconductor

零件编号
产品描述 (功能)
生产厂家
CY8C27666-SPSXET
Cypress
Cypress Semiconductor 
CY8C27666-SPSXET Datasheet PDF : 39 Pages
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CY8C27x66 Preliminary Data Sheet
PSoC™ Overview
Peak detectors
Many other topologies possible
Analog blocks are provided in columns of three, which includes
one CT (Continuous Time) and two SC (Switched Capacitor)
blocks. The number of blocks is dependant on the device family
which is detailed in the table titled “PSoC Device Characteris-
tics” on page 3.
P0[7]
P0[6]
P0[5]
P0[4]
P0[3]
P0[1]
P0[2]
P0[0]
P2[3]
P2[1]
P2[6]
P2[4]
P2[2]
P2[0]
Array Input Configuration
ACI0[1:0]
ACI1[1:0]
ACI2[1:0]
ACI3[1:0]
ACB00
Block Array
ACB01
ACB02
ACB03
ASC10
ASD11
ASC12 ASD13
ASD20
ASC21
ASD22 ASC23
Interface to
Digital System
RefHi
RefLo
AGND
Analog Reference
Reference
Generators
AGNDIn
RefIn
Bandgap
M8C Interface (Address Bus, Data Bus, Etc.)
Analog System Block Diagram
Additional System Resources
System Resources, some of which have been previously listed,
provide additSNRional capability useful to complete systems.
Additional resources include a multiplier, decimator, switch
mode pump, low voltage detection, and power on reset. Brief
statements describing the merits of each system resource are
presented below.
Digital clock dividers provide three customizable clock fre-
quencies for use in applications. The clocks can be routed to
both the digital and analog systems. Additional clocks can be
generated using digital PSoC blocks as clock dividers.
A multiply accumulate (MAC) provides a fast 8-bit multiplier
with 32-bit accumulate to assist in both general math as well
as digital filters.
The decimator provides a custom hardware filter for digital
signal, processing applications including the creation of Delta
Sigma ADCs.
The I2C module provides 100 and 400 kHz communication
over two wires. Slave, master, and multi-master modes are
all supported.
Low Voltage Detection (LVD) interrupts can signal the appli-
cation of falling voltage levels, while the advanced POR
(Power On Reset) circuit eliminates the need for a system
supervisor.
An internal 1.3 voltage reference provides an absolute refer-
ence for the analog system, including ADCs and DACs.
An integrated switch mode pump (SMP) generates normal
operating voltages from a single 1.2V battery cell, providing a
low cost boost converter.
PSOC Device Characteristics
Depending on your PSoC device characteristics, the digital and
analog systems can have 16, 8, or 4 digital blocks and 12, 6, or
3 analog blocks. The following table lists the resources
available for specific PSoC device groups.
PSoC Device Characteristics
PSoC Part
Number
CY8C29x66
up to
64
4
16
12
4
CY8C27x66
up to
44
2
8
12
4
CY8C27x43
up to
44
2
8
12
4
CY8C24x23
up to
24
1
4
12
2
CY8C22x13
up to
16
1
4
8
1
4
12
4
12
4
12
2
6
1
3
June 1, 2004
Document No. 38-12019 Rev. *B
3

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