CY7C63000 查看數據表（PDF） - Cypress Semiconductor

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产品描述 (功能)

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CY7C63000

Universal Serial Bus Microcontroller

Cypress Semiconductor 

PRELIMINARY

CY7C63000/CY7C63001

CY7C63100/CY7C63101

CY7C63200/CY7C63201

.

CLOCK

tCYC

tCH

tCL

Figure 8-1. Clock Timing

tr

D+

90%

10%

D−

tf

90%

10%

Figure 8-2. USB Data Signal Timing

9.0 Ordering Information

Ordering Code

CY7C63000-PC

EPROM

Size

2KB

Number

of GPIO

12

CY7C63000-SC

CY7C63001-PC

2KB 12

4KB 12

CY7C63001-SC

CY7C63001-WC

4KB 12

4KB 12

CY7C63100-SC

CY7C63101-SC

2KB 16

4KB 16

CY7C63101-WC

CY7C63200-PC

4KB 16

2KB 10

CY7C63201-PC

4KB 10

CY7C63201-WC

4KB 10

Document #: 38-00557-D

Package Type

20-Pin (300-Mil) PDIP

20-Pin (300-Mil) SOIC

20-Pin (300-Mil) PDIP

20-Pin (300-Mil) SOIC

20-Pin (300-Mil) Windowed CerDIP

24-Pin (300-Mil) SOIC

24-Pin (300-Mil) SOIC

24-Pin (300-Mil) Windowed CerDIP

18-Pin (300-Mil) PDIP

18-Pin (300-Mil) PDIP

18-Pin (300-Mil) Windowed CerDIP

Operating

Range

Commercial

Commercial

Commercial

Commercial

Commercial

Commercial

Commercial

Commercial

Commercial

Commercial

Commercial

24

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