MCM6206BB 查看數據表（PDF） - Motorola => Freescale
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MCM6206BB Datasheet PDF : 8 Pages
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Product Preview
32K x 8 Bit Fast Static RAM
The MCM6206BB is a 262,144 bit static random access memory organized as
32,768 words of 8 bits. Static design eliminates the need for external clocks or
timing strobes, while CMOS circuitry reduces power consumption and provides
for greater reliability.
This device meets JEDEC standards for functionality and pinout, and is avail-
able in plastic small–outline J–leaded packages.
• Single 5 V ± 10% Power Supply
• Fully Static — No Clock or Timing Strobes Necessary
• Fast Access Times: 12/15/20/25 ns
• Equal Address and Chip Enable Access Times
• Output Enable (G) Feature for Increased System Flexibility and to
Eliminate Bus Contention Problems
• Low Power Operation: 125 – 140 mA Maximum AC
• Fully TTL Compatible — Three State Output
BLOCK DIAGRAM
A
A
VCC
A
VSS
A
A
ROW
DECODER
MEMORY MATRIX
A
A
A
A
DQ
INPUT ...
COLUMN I/O
DATA
DQ
CONTROL
COLUMN DECODER
E
CIRCUIT
W CONTROL
G
AAAAAA
Order this document
by MCM6206BB/D
MCM6206BB
J PACKAGE
300 MIL SOJ
CASE
810B–03
PIN ASSIGNMENT
A1
A2
A3
A4
A5
A6
A7
A8
A9
A 10
DQ 11
DQ 12
DQ 13
VSS 14
28 VCC
27 W
26 A
25 A
24 A
23 A
22 G
21 A
20 E
19 DQ
18 DQ
17 DQ
16 DQ
15 DQ
PIN NAMES
A . . . . . . . . . . . . . . . . . . . . Address Input
DQ . . . . . . . . . . Data Input/Data Output
W . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . Output Enable
E . . . . . . . . . . . . . . . . . . . . . . Chip Enable
VCC . . . . . . . . . . . Power Supply (+ 5 V)
VSS . . . . . . . . . . . . . . . . . . . . . . . Ground
This document contains information on a product under development. Motorola reserves the right to change or discontinue this product without notice.
6/4/97
M© OMoTtoOroRla,OInLc.A19F97AST SRAM
MCM6206BB
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