CY7C1361C-133BZC(2006) 查看數據表（PDF） - Cypress Semiconductor

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CY7C1361C-133BZC
(Rev.:2006)

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM

Cypress Semiconductor 

CY7C1361C

CY7C1363C

Capacitance[15]

Parameter

Description

CIN

CCLK

CI/O

Input Capacitance

Clock Input Capacitance

Input/Output Capacitance

Thermal Resistance[15]

Test Conditions

TA = 25°C, f = 1 MHz,

VDD = 3.3V

VDDQ = 2.5V

Parameter

ΘJA

ΘJC

Description

Thermal Resistance

(Junction to Ambient)

Thermal Resistance

(Junction to Case)

Test Conditions

Test conditions follow standard

test methods and procedures

for measuring thermal

impedance, per EIA/JESD51

100 TQFP

Max.

5

5

5

100 TQFP

Package

29.41

6.31

119 BGA

Max.

5

5

7

165 FBGA

Max.

5

5

7

119 BGA

Package

34.1

165 FBGA

Package

16.8

14.0

3.0

Unit

pF

pF

pF

Unit

°C/W

°C/W

AC Test Loads and Waveforms

3.3V I/O Test Load

OUTPUT

3.3V

R = 317Ω

Z0 = 50Ω

OUTPUT

RL = 50Ω

5 pF

VT = 1.5V

INCLUDING

JIG AND

R = 351Ω

(a)

SCOPE

(b)

2.5V I/O Test Load

OUTPUT

2.5V

R = 1667Ω

Z0 = 50Ω

OUTPUT

RL = 50Ω

5 pF

VT = 1.25V

INCLUDING

R = 1538Ω

JIG AND

(a)

SCOPE (b)

Note:

15. Tested initially and after any design or process change that may affect these parameters.

VDDQ

GND

10%

≤ 1 ns

VDDQ

GND

10%

≤ 1 ns

ALL INPUT PULSES

90%

(c)

ALL INPUT PULSES

90%

(c)

90%

10%

≤ 1 ns

90%

10%

≤ 1 ns

Document #: 38-05541 Rev. *F

Page 20 of 31

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