CY7C1355C-100BGC 查看數據表（PDF） - Cypress Semiconductor

零件编号

产品描述 (功能)

生产厂家

CY7C1355C-100BGC

9-Mbit (256K x 36/512K x 18) Flow-Through SRAM with NoBL™ Architecture

Cypress Semiconductor 

CY7C1355C

CY7C1357C

Truth Table[2, 3, 4, 5, 6, 7, 8]

Operation

NOP/WRITE ABORT (Begin Burst)

Address

Used CE1 CE2 CE3 ZZ ADV/LD WE BWX OE CEN CLK

None L H L L

L

L H X L L->H

WRITE ABORT (Continue Burst)

IGNORE CLOCK EDGE (Stall)

Next X X X L

H

X H X L L->H

Current X X X L

X

X X X H L->H

SLEEP MODE

None X X X H

X

X X XX X

Partial Truth Table for Read/Write[2, 3, 9]

DQ

Tri-State

Tri-State

–

Tri-State

Read

Function (CY7C1355C)

Write No bytes written

Write Byte A – (DQA and DQPA)

Write Byte B – (DQB and DQPB)

Write Byte C – (DQC and DQPC)

Write Byte D – (DQD and DQPD)

Write All Bytes

WE

BWA

BWB

BWC

BWD

H

X

X

X

X

L

H

H

H

H

L

L

H

H

H

L

H

L

H

H

L

H

H

L

H

L

H

H

H

L

L

L

L

L

L

Truth Table for Read/Write[2, 3,9]

Read

Function (CY7C1357C)

Write - No bytes written

Write Byte A – (DQA and DQPA)

Write Byte B – (DQB and DQPB)

Write All Bytes

WE

BWA

BWB

H

X

X

L

H

H

L

H

H

L

H

H

L

L

L

Note:

9. Table only lists a partial listing of the byte write combinations. Any combination of BWX is valid. Appropriate write will be done based on which byte write is active.

Document #: 38-05539 Rev. *E

Page 10 of 28

[+] Feedback

Share Link: