CY7C1046BL-12VC 查看數據表（PDF） - Cypress Semiconductor
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CY7C1046BL-12VC Datasheet PDF : 8 Pages
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Switching Waveforms (continued)
Write Cycle No. 1 (CE Controlled)[14, 15]
ADDRESS
CE
tSA
WE
DATA I/O
tWC
tSCE
tSCE
tAW
tPWE
tSD
DATA VALID
Write Cycle No. 2 (WE Controlled, OE HIGH During Write)[14, 15]
tWC
ADDRESS
tSCE
CE
tAW
tSA
tPWE
WE
OE
DATA I/O
NOTE 16
tHZOE
tSD
DATAIN VALID
Notes:
14. Data I/O is high impedance if OE = VIH.
15. If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state.
16. During this period the I/Os are in the output state and input signals should not be applied.
CY7C1046B
tHA
tHD
1046B–8
tHA
tHD
1046B–9
Document #: 38-05144 Rev. **
Page 5 of 8
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