M27C322-80B3 查看數據表（PDF） - STMicroelectronics

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M27C322-80B3

32 Mbit (2Mb x16) UV EPROM and OTP EPROM

STMicroelectronics 

M27C322

Figure 3.

Programming Flowchart

VCC = 6.25V, VPP = 12V

SET MARGIN MODE

n=0

NO

++n

= 25

YES

E = 50µs Pulse

NO

VERIFY

YES

++ Addr

FAIL

Last NO

Addr

YES

RESET MARGIN MODE

CHECK ALL WORDS

1st: VCC = 6V

2nd: VCC = 4.2V

AI02206

Device operation

2.7

Program Inhibit

Programming of multiple M27C322s in parallel with different data is also easily

accomplished. Except for E, all like inputs including GVPP of the parallel M27C322 may be

common. A TTL low level pulse applied to a M27C322's E input and VPP at 12V, will

program that M27C322. A high level E input inhibits the other M27C322s from being

programmed.

2.8

Program Verify

A verify (read) should be performed on the programmed bits to determine that they were

correctly programmed. The verify is accomplished with GVPP at VIL. Data should be verified

with tELQV after the falling edge of E.

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