CXA3516 查看數據表（PDF） - Sony Semiconductor

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CXA3516

3-channel 8-bit 165MSPS A/D Converter Amplifier PLL

Sony Semiconductor 

CXA3516R

Pin

No.

Symbol

PLL block

I/O

Typical

signal

111 SYNCIN1

I TTL

Equivalent circuit

112 SYNCIN2

I TTL

106 HOLD

I TTL

DVCCPLL

40k

106 107 192

108 111

112

108 EVEN/ODD I TTL

DGNDPLL

107 XTLOAD

I TTL

110 CLKIN

109 XCLKIN

DVCCPLL

I PECL

110

109

14k

500

14k

500

I PECL

Description

Input SYNC signal at TTL level.

The input polarity is switched by the

control register.

Leave this pin open when not used.

Input SYNC signal at TTL level.

The input polarity is switched by the

control register.

Leave this pin open when not used.

Input signal for phase comparison

HOLD.

Phase comparison is stopped, and

VCO oscillation frequency is held.

When not be hold, fix the pin as

follows.

When HOLDPOL register is "1", fix

this pin to low level.

When HOLDPOL register is "0", leave

this pin open or fix to high level.

1.5V

Input the signal used to invert the

A/D converter sampling CLK.

Low: EVEN mode

High: ODD mode

Normally fix it to low level.

Programmable counter reset.

Normally fix it to high level or leave

open.

In programmable counter test mode,

set it to low level to call up the register

contents.

When not used, leave this pin open

or fix to high level.

CLK input for ADC operation check.

Input PECL level signal

complementally.

When using this pin, set CLK to

external input by the control register.

Leave this pin open when not used.

DGNDPLL

– 16 –

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