CDP1802BCQ 查看數據表（PDF） - Intersil

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CDP1802BCQ

CMOS 8-Bit Microprocessors

Intersil 

CDP1802A, CDP1802AC, CDP1802BC

Block Diagram

B

ALU

D

I/O REQUESTS

MEMORY ADDRESS LINES I/O FLAGS

MA6 MA4 MA2 MA0 EF1 EF3

MA7 MA5 MA3 MA1

EF2 EF4

DMA

OUT

DMA

IN INT

CONTROL

CLEAR

WAIT

MUX

A

CLOCK

LOGIC

CONTROL AND

TIMING LOGIC

TO INSTRUCTION

DECODE

CLOCK

XTAL

SCO

SCI

STATE

CODES

Q LOGIC

TPA

TPB

MWR

SYSTEM

TIMING

MRD

R(0).1

R(0).0

REGISTER

ARRAY

R(1).1 R(1).0 R

INCR/ R(2).1 R(2).0

DF DECR

N0

R(9).1 R(9).0

LATCH

AND

X

T

P

R(A).1 R(A).0

DECODE

I

N

N1

I/O

COMMANDS

N2

R(E).1 R(E).0

R(F).1 R(F).0

BUS 0

8-BIT BIDIRECTIONAL DATA BUS

BUS 1

BUS 2

BUS 3

BUS 4

BUS 5

BUS 6

BUS 7

FIGURE 2.

3-5

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