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CAT5221WI10(2013) 查看數據表(PDF) - ON Semiconductor

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CAT5221WI10 Datasheet PDF : 15 Pages
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CAT5221
Table 2. ABSOLUTE MAXIMUM RATINGS
Parameter
Ratings
Units
Temperature Under Bias
55 to +125
C
Storage Temperature
65 to +150
C
Voltage on any Pin with Respect to VSS (Note 1)
VCC with Respect to Ground
Package Power Dissipation Capability (TA = 25C)
Lead Soldering Temperature (10 s)
2.0 to +VCC +2.0
V
2.0 to +7.0
V
1.0
W
300
C
Wiper Current
12
mA
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
Table 3. RECOMMENDED OPERATING CONDITIONS (Vcc = +2.5 V to +6 V)
Parameter
Operating Ambient Temperature (Industrial)
Ratings
40 to +85
Units
C
Table 4. POTENTIOMETER CHARACTERISTICS (Over recommended operating conditions unless otherwise stated.)
Symbol
Parameter
Test Conditions
Min
Typ
Max Units
RPOT
RPOT
RPOT
RPOT
Potentiometer Resistance (00)
Potentiometer Resistance (50)
Potentiometer Resistance (10)
Potentiometer Resistance (2.5)
Potentiometer Resistance Tolerance
100
kW
50
kW
10
kW
2.5
kW
20
%
RPOT Matching
Power Rating
25C, each pot
1
%
50
mW
IW
RW
RW
VTERM
VN
Wiper Current
Wiper Resistance
Wiper Resistance
Voltage on any RH or RL Pin
Noise
Resolution
IW = +3 mA @ VCC = 3 V
IW = +3 mA @ VCC = 5 V
VSS = 0 V
(Note 3)
GND
80
TBD
1.6
6
mA
300
W
150
W
VCC
nV/Hz
%
Absolute Linearity (Note 4)
RW(n)(actual) R(n)(expected)
(Note 7)
1
LSB
(Note 6)
Relative Linearity (Note 5)
RW(n+1) [RW(n)+LSB]
(Note 7)
0.2
LSB
(Note 6)
TCRPOT Temperature Coefficient of RPOT
(Note 3)
300
ppm/C
TCRATIO Ratiometric Temp. Coefficient
(Note 3)
20
ppm/C
CH/CL/CW Potentiometer Capacitances
(Note 3)
10/10/25
pF
fc
Frequency Response
RPOT = 50 kW
0.4
MHz
1. The minimum DC input voltage is –0.5 V. During transitions, inputs may undershoot to –2.0 V for periods of less than 20 ns. Maximum DC
voltage on output pins is VCC +0.5 V, which may overshoot to VCC +2.0 V for periods of less than 20 ns.
2. Latch-up protection is provided for stresses up to 100 mA on address and data pins from –1 V to VCC + 1 V.
3. This parameter is tested initially and after a design or process change that affects the parameter.
4. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage as determined by wiper position when used as a
potentiometer.
5. Relative linearity is utilized to determine the actual change in voltage between two successive tap positions when used as a potentiometer.
It is a measure of the error in step size.
6. LSB = RTOT / 63 or (RH RL) / 63, single pot
7. n = 0, 1, 2, ..., 63
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