AS4LC2M8S1-8TC 查看數據表（PDF） - Alliance Semiconductor

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AS4LC2M8S1-8TC

3.3V 2M × 8/1M × 16 CMOS synchronous DRAM

Alliance Semiconductor 

AS4LC2M8S1

AS4LC1M16S1

®

Read/write waveform

CLK

CS

RAS

CAS

WE

A11

A10

tRCD

RAa

A0–A9 RAa

CAa

DQM

CKE

DQ

Bank activate

Read

(BL = 8, CL = 3)

tRAS

RAb

CAb

RAb

Aa0 Aa1 Aa2 Aa3 Aa4 Aa5

QQQ QQQ

tRP

Ab0 Ab1 Ab2 Ab3 Ab4 Ab5

DDD DDD

Bank activate

Write

Precharge

Burst read/single write waveform

CLK

CS

RAS

CAS

WE

A11

A10

RAa

A9

RAa

CAa

DQM

CKE

DQ

Activate

Read

Aa0 Aa1 Aa2 Aa3

QQQ Q

CAb

CAc

Ab

Ac

Single

Write

D

D

CAd

Read

(BL = 4, CL = 3)

Ad0 Ad1 Ad2 Ad3

QQQ Q

5/21/01; v.1.1

Alliance Semiconductor

P. 24 of 29

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