SAB9082H/N3 查看數據表（PDF） - Philips Electronics

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SAB9082H/N3

NTSC Picture-In-Picture (PIP) controller

Philips Electronics 

Philips Semiconductors

NTSC Picture-In-Picture (PIP) controller

Preliminary specification

SAB9082

FUNCTIONAL DESCRIPTION

Acquisition

The internal pixel rate is 28 MHz for the Y, U and V

channels. It is expected that the bandwidth of the input

signals will be limited to 4.5 MHz for the Y input and

1.125 MHz for the U and V inputs. Inset synchronization is

achieved via the acquisition HSYNC and VSYNC pins of

the main channel. The display is driven by the main

channel clock.

The starting-point of the acquisition can be controlled with

the acquisition fine positioning added to a system

constant. With a nominal input fHSYNC and standard NTSC

signals, 1408 samples (active video) are acquired and

processed by the SAB9082. Here, the nominal input

fHSYNC results in a nominal system clock frequency of

1792 × fHSYNC (approximately 28 MHz).

PIP modes

handbook, full pagewidth

MAIN

SUB

SUB

MAIN

MAIN

REPLAY

SUB

MGM810

Fig.3 PIP modes.

1999 Nov 12

7

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