AT89LV55-12JI 查看數據表（PDF） - Atmel Corporation

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AT89LV55-12JI

8-bit Microcontroller with 20K Bytes Flash

Atmel Corporation 

AT89LV55

4.6 Port 3

Port 3 is an 8-bit bi-directional I/O port with internal pullups. The Port 3 output buffers can

sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high by the inter-

nal pullups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low

will source current (IIL) because of the pullups.

Port 3 also serves the functions of various special features of the AT89LV55, as shown in the

following table.

Port Pin

P3.0

P3.1

P3.2

P3.3

P3.4

P3.5

P3.6

P3.7

Alternate Functions

RXD (serial input port)

TXD (serial output port)

INT0 (external interrupt 0)

INT1 (external interrupt 1)

T0 (timer 0 external input)

T1 (timer 1 external input)

WR (external data memory write strobe)

RD (external data memory read strobe)

Port 3 also receives the highest-order address bit and some control signals for Flash program-

ming and verification.

4.7 RST

Reset input. A high on this pin for two machine cycles while the oscillator is running resets the

device.

4.8 ALE/PROG

Address Latch Enable is an output pulse for latching the low byte of the address during

accesses to external memory. This pin is also the program pulse input (PROG) during Flash

programming.

In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator frequency and may be

used for external timing or clocking purposes. Note, however, that one ALE pulse is skipped dur-

ing each access to external data memory.

If desired, ALE operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set,

ALE is active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled high.

Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode.

4.9 PSEN

Program Store Enable is the read strobe to external program memory.

When the AT89LV55 is executing code from external program memory, PSEN is activated twice

each machine cycle, except that two PSEN activations are skipped during each access to exter-

nal data memory.

5

0811D–MICRO–3/06

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