AT49BV162A 查看數據表（PDF） - Atmel Corporation

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AT49BV162A

16-megabit (1M x 16/2M x 8) 3-volt Only Flash Memory

Atmel Corporation 

AT49BV162/163A(T)

not, or reading the protection register, the Product ID Exit command must be given prior to per-

forming any other operation.

4.13 RDY/BUSY

An open-drain READY/BUSY output pin provides another method of detecting the end of a pro-

gram or erase operation. RDY/BUSY is actively pulled low during the internal program and erase

cycles and is released at the completion of the cycle. The open-drain connection allows for OR-

tying of several devices to the same RDY/BUSY line. Please see “Status Bit Table” on page 12

for more details.

4.14

Common Flash Interface (CFI)

CFI is a published, standardized data structure that may be read from a flash device. CFI allows

system software to query the installed device to determine the configurations, various electrical

and timing parameters, and functions supported by the device. CFI is used to allow the system

to learn how to interface to the flash device most optimally. The two primary benefits of using

CFI are ease of upgrading and second source availability. The command to enter the CFI Query

mode is a one-bus cycle command which requires writing data 98h to address 55h. The CFI

Query command can be written when the device is ready to read data or can also be written

when the part is in the product ID mode. Once in the CFI Query mode, the system can read CFI

data at the addresses given in “Common Flash Interface Definition Table” on page 24. To exit

the CFI Query mode, the product ID exit command must be given.

4.15

Hardware Data Protection

The Hardware Data Protection feature protects against inadvertent programs to the

AT49BV162A(T)/163A(T) in the following ways: (a) VCC sense: if VCC is below 1.8V (typical), the

program function is inhibited. (b) VCC power-on delay: once VCC has reached the VCC sense

level, the device will automatically time out 10 ms (typical) before programming. (c) Program

inhibit: holding any one of OE low, CE high or WE high inhibits program cycles. (d) Program

inhibit: VPP is less than VILPP. (e) VPP power-on delay: once VPP has reached 1.65V, program

and erase operations are inhibited for 100 ns.

4.16

Input Levels

While operating with a 2.65V to 3.6V power supply, the address inputs and control inputs (OE,

CE and WE) may be driven from 0 to 5.5V without adversely affecting the operation of the

device. The I/O lines can only be driven from 0 to VCC + 0.6V.

9

3349H–FLASH–3/05

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