AT24C02C-PUM 查看數據表（PDF） - Atmel Corporation

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AT24C02C-PUM

Two-wire Serial Electrically Erasable and Programmable Read-only Memory

Atmel Corporation 

Atmel AT24C02C

4. Bus Timing

Figure 4-1. SCL: Serial Clock, SDA: Serial Data I/O

tF

tHIGH

SCL

tLOW

tLOW

SDA IN

tSU.STA

tHD.STA

tHD.DAT

tSU.DAT

tAA

tDH

SDA OUT

tR

tSU.STO

tBUF

5. Write Cycle Timing

Figure 5-1. SCL: Serial Clock, SDA: Serial Data I/O

SCL

SDA

8th BIT

ACK

WORDn

STOP

CONDITION

(1)

twr

START

CONDITION

Notes: 1. The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the internal

clear/write cycle

7

8700D–SEEPR–8/10

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