
ProASICPLUS Flash Family FPGAs
÷1
Global MUX B OUT
÷n
33 MHz
÷m
÷4
180˚
PLL Core
0˚
D
D
External Feedback
Global MUX A OUT
Figure 1-16 • Using the PLL 33 MHz In, 133 MHz Out
D GLB
÷u
÷1
133 MHz
÷v
D GLA
÷4
Global MUX B OUT
÷n
40 MHz
÷m
÷5
180˚
PLL Core
0˚
D
D
External Feedback
Global MUX A OUT
Figure 1-17 • Using the PLL 40 MHz In, 50 MHz Out
D GLB
÷u
50 MHz
÷1
÷v
D GLA
v5.7
1-17