AN2104 查看數據表（PDF） - Freescale Semiconductor

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AN2104

Using Background Debug Mode for the M68HC12 Family

Freescale Semiconductor 

Application Note

Freescale Semiconductor, Inc.

Follow these steps in order:

1. Load P&E’s PKG12Z software.

2. Connect a parallel cable from the host PC to the Cable12 POD.

3. Connect the 6-pin BDM cable from the POD to the evaluation

board making sure that pin 1 of the cable is connected to pin 1 of

the POD and target. On the evaluation board, make sure that

jumpers W3 and W4 are in the EVB positions and jumper W7 is in

the VDD position.

4. Apply +5 Vdc to P5 of the evaluation board and +12 Vdc to W8.

5. Launch P&E’s WinIDE.

6. Open P&E’s sample code named SCI.

7. Assemble/compile this file. See Figure 6.

8. Launch the programmer. If the correction assistant window opens,

select the correct parallel port being used. Defaults should work

for the other options in this window. See Figure 7.

9. Select the 9b32_32k.12p programming algorithm.

10. Input $8000 for the base address when prompted.

11. Move jumper W7, on the evaluation board, to the VPP position.

12. Select Erase Module.

13. Ensure that the SCI.s19 file is in the S-record in the configuration

window. If not, select Specify S record and select this file.

14. Select Program Module.

15. After programming is complete, move jumper W7 to the VDD

position. Do not leave the programming voltage on the FLASH.

16. The SCI.s19 file has now been erased and programmed into the

FLASH of the MC68HC912B32 using the BDM. Select Verify

Module to verify that this programming is correct. The code also

can be viewed by selecting Show Module at address $8000.

AN2104

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