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Analog Input Measurement Without the Input
Buffer
With the buffer disabled by setting the BUFEN pin
low, the ADS1225 and ADS1226 measure the input
signal using internal capacitors that are continuously
charged and discharged. Figure 20 shows a
simplified schematic of the ADS1225/6 input circuitry,
with Figure 21 showing the on/off timings of the
switches. The S1 switches close during the input
sampling phase. With S1 closed, CA1 charges to
AINP, CA2 charges to AINN, and CB charges to
(AINP – AINN). For the discharge phase, S1 opens
first and then S2 closes. CA1 and CA2 discharge to
approximately VDD/2 and CB discharges to 0V. The
constant charging of the input capacitors presents a
load on the inputs that can be represented by
effective impedances. Figure 22 shows the input
circuitry with the capacitors and switches of
Figure 20 by their effective impedances.
AINPx
AINNx
ESD Protection
AVDD
AVDD/2
AINP S1
CA1
3pF
S2
MUX
AINN S1
CB
6pF
AVDD
S2
CA2
3pF
AVDD/2
Figure 20. Simplified Input Structure with the
Buffer Turned Off
ON
S1
OFF
ON
S2
OFF
tSAMPLE = 12ms
Figure 21. S1 and S2 Switch Timing for Figure 20
ADS1225
ADS1226
SBAS346 – MAY 2006
AINPx
AINNx
AVDD/2
ZeffA = tSAMPLE/CA1 = 4MW
ZeffB = tSAMPLE/CB = 2MW
ZeffA = tSAMPLE/CA2 = 4MW
AVDD/2
Figure 22. Effective Analog Input Impedances
with the Buffer Off
ESD silicon diodes protect the inputs. To keep these
diodes from turning on, make sure the voltages on
the input pins do not go below GND by more than
100mV, and likewise do not exceed VDD by 100mV.
This limitation is shown in Equation 1:
GND * 100mV t (AINP, AINN) t VDD ) 100mV
(1)
Analog Input Measurement with the Input Buffer
When the buffer is enabled by setting the BUFEN pin
high, a low-drift, chopper-stabilized input buffer is
used to achieve very high input impedance. The
buffer charges the input sampling capacitors, thus
removing the load from the measurement. Because
the input buffer is chopper-stabilized, the charging of
parasitic capacitances causes the charge to be
carried away, as if by resistance. The input
impedance can be modeled by a single resistor, as
shown in Figure 23.
AINP
AINN
1GW
Figure 23. Effective Analog Input Impedances
with the Buffer On
Note that the analog inputs (listed in the Electrical
Characteristics table as Absolute Input Range) must
remain between GND + 0.05V to AVDD – 1.5V.
Exceeding this range degrades linearity and results
in performance outside the specified limits.
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