ADN4670BSTZ-REEL7 查看數據表（PDF） - Analog Devices

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ADN4670BSTZ-REEL7

Programmable Low Voltage 1:10 LVDS Clock Driver

Analog Devices 

Data Sheet

ADN4670

SPECIFICATIONS

VDD = 2.375 V to 2.625 V; all specifications TMIN to TMAX, unless otherwise noted.

Table 1.

Parameter

RECEIVER

Input High Threshold at CLK0/CLK0 or CLK1/CLK1

Input Low Threshold at CLK0/CLK0 or CLK1/CLK1

Differential Input Voltage

Input Common-Mode Voltage

Input Current at CLK0, CLK0, CLK1, or CLK1

Input Capacitance

DRIVER

Differential Output Voltage

VOD Magnitude Change

Offset Voltage

VOS Magnitude Change

Output Short Circuit Current

Reference Output Voltage

Output Capacitance

SUPPLY CURRENT

Supply Current

Symbol Min Typ Max

Unit Conditions/Comments

VTH

VTL

|VID|

VIC

IIH, IIL

CI

−100

200

0.5|VID|

−5

3

100

mV

mV

mV

VDD − 0.5|VID|

+5

μA

pF

VI = VDD or VI = 0 V

VI = VDD or GND

|VOD|

ΔVOD

VOS

ΔVOS

IOS

VBB

CO

250

450 600

50

0.95 1.2 1.45

350

−20

20

1.15 1.25 1.35

3

mV RL = 100 Ω

mV

V

−40°C to +85°C

mV

mA VO = 0 V

mA |VOD| = 0 V

V

VDD = 2.5 V, I = −100 µA

pF VO = VDD or GND

IDD

35

mA All outputs tristated, f = 0 Hz

100 110

mA All outputs enabled and loaded,

RL = 100 Ω, f = 100 MHz

150 160

mA All outputs enabled and loaded,

RL = 100 Ω, f = 800 MHz

JITTER CHARACTERISTICS

Table 2.

Parameter

Additive Phase Jitter from Input to LVDS Outputs, Q3 and Q3

Symbol Min Typ Max Unit Conditions/Comments

tJITTER LVDS

281

fS rms 12 kHz to 5 MHz, fOUT = 30.72 MHz

111

fS rms 12 kHz to 20 MHz, fOUT = 125 MHz

Rev. A | Page 3 of 12

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