ADL5502ACBZ-P2 查看數據表（PDF） - Analog Devices

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ADL5502ACBZ-P2

450 MHz to 6000 MHz Crest Factor Detector

Analog Devices 

1000

200

900

180

800

160

700

140

COUT

600

120

500

100

400

80

CFLTR

300

60

200

40

100

20

0

0

1

10

100

1000

CAPACITANCE (nF)

Figure 52. Response Time vs. CFLTR and COUT

POWER CONSUMPTION, ENABLE, AND POWER-

ON/POWER-OFF RESPONSE TIME

The quiescent current consumption of the ADL5502 varies

linearly with the size of the input signal from approximately

3 mA for no signal up to 11 mA at an input level of 0.7 V rms

(10 dBm, re: 50 Ω). There is little variation in quiescent current

across power supply voltage or temperature, as shown in Figure 37.

The ADL5502 can be disabled either by pulling the ENBL (Pin 8)

to COMM (Pin 4) or by removing the supply power to the device.

Disabling the device via the ENBL function reduces the leakage

current to less than 1 μA. When the device is disabled, the output

impedance increases to approximately 5.5 kΩ on VRMS and

1.9 kΩ on PEAK.

The turn-on time and pulse response is strongly influenced by

the size of the square-domain filter and output shunt capacitor.

Figure 53 shows a plot of the output response to an RF pulse on

the RFIN pin, with a 0.1 μF output filter capacitor and no square-

domain filter capacitor. The falling edge is particularly dependent

on the output shunt capacitance, as shown in Figure 53.

PULSED RFIN

400mV rms RF INPUT

250mV rms

160mV rms

70mV rms

VRMS

1ms/DIV

Figure 53. Output Response to Various RF Input Pulse Levels, Supply 3 V,

900 MHz Frequency, Square-Domain Filter Open, Output Filter 0.1 μF

ADL5502

To improve the falling edge of the enable and pulse responses, a

resistor can be placed in parallel with the output shunt capacitor.

The added resistance helps to discharge the output filter capacitor.

Although this method reduces the power-off time, the added

load resistor also attenuates the output (see the Output Drive

Capability and Buffering section).

PULSED RFIN

400mV rms RF INPUT

250mV rms

160mV rms

70mV rms

VRMS

1ms/DIV

Figure 54. Output Response to Various RF Input Pulse Levels,

Supply 3 V, 900 MHz Frequency, Square-Domain Filter Open,

Output Filter 0.1 μF with Parallel 1 kΩ

The square-domain filter improves the rms accuracy for high

crest factors (see the Selecting the Square-Domain Filter and

Output Low-Pass Filter section), but it can hinder the response

time. For optimum response time and low ac residual, both the

square-domain filter and the output filter should be used. The

square-domain filter at FLTR can be reduced to improve response

time, and the remaining ac residual can be decreased by using

the output filter, which has a smaller time constant.

DEVICE CALIBRATION AND ERROR CALCULATION

Because slope and intercept vary from device to device, board-

level calibration must be performed to achieve high accuracy.

In general, calibration is performed by applying two input power

levels to the ADL5502 and measuring the corresponding output

voltages. The calibration points are generally chosen to be within

the linear operating range of the device. The best-fit line is

characterized by calculating the conversion gain (or slope) and

intercept using the following equations:

Gain = (VVRMS2 − VVRMS1)/(VIN2 − VIN1)

(3)

Intercept = VVRMS1 − (Gain × VIN1)

(4)

where:

VIN is the rms input voltage to RFIN.

VVRMS is the voltage output at VRMS.

Once gain and intercept are calculated, an equation can be

written that allows calculation of an (unknown) input power

based on the measured output voltage.

VIN = (VVRMS − Intercept)/Gain

(5)

Rev. A | Page 19 of 28

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