AD9557(RevA) 查看數據表（PDF） - Analog Devices

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AD9557
(Rev.:RevA)

Dual Input Multiservice Line Card Adaptive Clock Translator

Analog Devices 

AD9557

–80

INTEGRATED RMS JITTER (12kHz TO 20MHz): 302fs

–90

–100

–110

–120

–130

–140

–150

–160

100

1k

10k

100k

1M

10M

100M

FREQUENCY OFFSET (Hz)

Figure 7. Absolute Phase Noise (Output Driver = 3.3.V CMOS),

fR = 19.44 MHz, fO = 161.1328125 MHz,

DPLL Loop BW = 100 Hz, fSYS = 49.152 MHz Crystal

–70

INTEGRATED RMS JITTER (12kHz TO 20MHz): 308fs

–80

–90

–100

–110

–120

–130

–140

–150

–160

100

1k

10k

100k

1M

10M

100M

FREQUENCY OFFSET (Hz)

Figure 8. Absolute Phase Noise (Output Driver = HSTL),

fR = 2 kHz, fO = 125 MHz,

DPLL Loop BW = 100 Hz, fSYS = 49.152 MHz Crystal

–60

INTEGRATED RMS JITTER (12kHz TO 20MHz): 343fs

–70

–80

–90

–100

–110

–120

–130

–140

–150

–160

100

1k

10k

100k

1M

10M

100M

FREQUENCY OFFSET (Hz)

Figure 9. Absolute Phase Noise (Output Driver = HSTL),

fR = 25 MHz, fO = 1 GHz,

DPLL Loop BW = 500 Hz, fSYS = 49.152 MHz Crystal

Data Sheet

–60

INTEGRATED RMS JITTER (12kHz TO 20MHz): 393fs

–70

–80

–90

–100

–110

–120

–130

–140

–150

–160

10

100

1k

10k 100k

1M

10M 100M

FREQUENCY OFFSET (Hz)

Figure 10. Absolute Phase Noise (Output Driver = HSTL),

fR = 19.44 MHz, fO = 644.53 MHz,

DPLL Loop BW = 0.1 Hz, fSYS = 19.2 MHz TCXO

–60

INTEGRATED RMS JITTER (12kHz TO 20MHz): 371s

–70

–80

–90

–100

–110

–120

–130

–140

–150

–160

10

100

1k

10k 100k

1M

10M 100M

FREQUENCY OFFSET (Hz)

Figure 11. Absolute Phase Noise (Output Driver = HSTL),

fR = 19.44 MHz, fO = 693.482991 MHz,

DPLL Loop BW = 0.1 Hz, fSYS = 19.2 MHz TCXO

–70

INTEGRATED RMS JITTER (12kHz TO 20MHz): 404fs

–80

–90

–100

–110

–120

–130

–140

–150

–160

10

100

1k

10k 100k

1M

10M 100M

FREQUENCY OFFSET (Hz)

Figure 12. Absolute Phase Noise (Output Driver = HSTL),

fR = 19.44 MHz, fO = 312.5 MHz,

DPLL Loop BW = 0.1 Hz, fSYS = 19.2 MHz TCXO

Rev. A | Page 20 of 92

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