AD8223
Preliminary Technical Data
APPLICATIONS INFORMATION
+VS
+2.5V TO +6V
+
0.1µF 10µF
VIN RG
+
RG
OUTPUT
RG REF
–
VOUT
REF (INPUT)
VIN RG
+VS
+3V TO +12V
+
0.1µF 10µF
+
RG
OUTPUT
RG REF
–
VOUT
REF (INPUT)
0.1µF +10µF
–2.5V TO –6V
–VS
A. DUAL SUPPLY
B. SINGLE SUPPLY
Figure 34. Basic Connections
BASIC CONNECTION
OUTPUT BUFFERING
Figure 34 shows the basic connection circuit for the AD8223.
The +VS and −VS terminals are connected to the power supply.
The supply can be either bipolar (VS = ±2.5 V to ±12.5 V) or
single supply (−VS = 0 V, +VS = +3.0 V to +25 V). Power
supplies should be capacitively decoupled close to the device’s
power pins. For best results, use surface-mount 0.1 μF ceramic
chip capacitors and 10 μF electrolytic tantalum capacitors.
The input voltage, which can be either single-ended (tie either
−IN or +IN to ground) or differential, is amplified by the
programmed gain. The output signal appears as the voltage
difference between the output pin and the externally applied
voltage on the REF input.
The AD8223 is designed to drive loads of 10 kΩ or greater. If
the load is less than this value, the AD8223 output should be
buffered with a precision single-supply op amp such as the
OP113. This op amp can swing from 0 V to 4 V on its output
while driving a load as small as 600 Ω.
5V
0.1µF
5V
VIN RG
+
AD8223
–
REF
0.1µF
+
OP113
–
VOUT
DIFFERENTIAL OUTPUT
Figure 35 shows how to create a differential output in-amp. A
OP1177 op amp creates the inverted output. Because the op
amp drives the AD8223 reference pin, the AD8223 can still
ensure that the differential voltage is correct. Errors from the
op amp or mismatched resistors are common to both outputs
and are thus common mode. These common-mode errors
should be rejected by the next device in the signal chain.
+IN
AD8223
–IN
REF 20kΩ
+OUT
VREF
20kΩ
–
+
OP1177
–OUT
Figure 35. Differential Output Using Op Amp
Figure 36. Output Buffering
CABLES
Receiving from a Cable
In many applications, shielded cables are used to minimize
noise; for best CMR over frequency, the shield should be
properly driven. Figure 37 shows an active guard drive that
is configured to improve ac common-mode rejection by
bootstrapping the capacitances of input cable shields, thus
minimizing the capacitance mismatch between the inputs.
100Ω
–INPUT
AD8031
+INPUT
+VS
2
RG 1
7
2
RG
AD8223 6
2
8
3
5
4
–VS
Figure 37. Common-Mode Shield Driver
VOUT
REFERENCE
Rev. PrA | Page 16 of 20