AD7870CQ 查看數據表（PDF） - Analog Devices

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AD7870CQ

LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs

Analog Devices 

AD7870/AD7875/AD7876

PIN FUNCTION DESCRIPTION

DIP

Pin

Pin No. Mnemonic Function

1

2

3

4

5

6

7

8–11

12

13–16

RD

Read. Active low logic input. This input is used in conjunction with CS low to enable the data outputs.

BUSY/INT Busy/Interrupt, Active low logic output indicating converter status. See timing diagrams.

CLK

DB11/HBEN

Clock input. An external TTL-compatible clock may be applied to this input pin. Alternatively, tying this pin to

VSS enables the internal laser-trimmed clock oscillator.

Data Bit 11 (MSB)/High Byte Enable. The function of this pin is dependent on the state of the 12/8/CLK input (see

below). When 12-bit parallel data is selected, this pin provides the DB11 output. When byte data is selected, this pin

becomes the HBEN logic input HBEN is used for 8-bit bus interfacing. When HBEN is low, DB7/LOW to DB0/DB8

become DB7 to DB0. With HBEN high, DB7/LOW to DB0/DB8 are used for the upper byte of data (see Table I).

DB10/SSTRB Data Bit 10/Serial Strobe. When 12-bit parallel data is selected, this pin provides the DB10 output. SSTRB is an

active low open-drain output that provides a strobe or framing pulse for serial data. An external 4.7 kΩ pull-up

resistor is required on SSTRB.

DB9/SCLK

Data Bit 9/Serial Clock. When 12-bit parallel data is selected, this pin provides the DB9 output. SCLK is the gated

serial clock output derived from the internal or external ADC clock. If the 12/8/CLK input is at –5 V, then SCLK

runs continuously. If 12/8/CLK is at 0 V, then SCLK is gated off after serial transmission is complete. SCLK is an

open-drain output and requires an external 2 kΩ pull-up resistor.

DB8/SDATA Data Bit 8/Serial Data. When 12-bit parallel data is selected, this pin provides the DB8 output. SDATA is an open-

drain serial data output which is used with SCLK and SSTRB for serial data transfer. Serial data is valid on the fall-

ing edge of SCLK while SSTRB is low. An external 4.7 kΩ pull-up resistor is required on SDATA.

DB7/LOW–

DB4/LOW

Three-state data outputs controlled by CS and RD. Their function depends on the 12/8/CLK and HBEN inputs.

With 12/8/CLK high, they are always DB7–DB4. With 12/8/CLK low or –5 V, their function is controlled by HBEN

(see Table I).

DGND

Digital Ground. Ground reference for digital circuitry.

DB3/DB11–

DB0/DB8

Three-state data outputs which are controlled by CS and RD. Their function depends on the 12/8/CLK and HBEN

inputs. With 12/8/CLK high, they are always DB3–DB0. With 12/8/CLK low or –5 V, their function is controlled by

HBEN (see Table I).

Table I. Output Data for Byte Interfacing

HBEN DB7/LOW DB6/LOW DB5/LOW DB4/LOW DB3/DB11

HIGH LOW

LOW

LOW

LOW

DB11(MSB)

LOW DB7

DB6

DB5

DB4

DB3

DB2/DB10 DB1/DB9 DB0/DB8

DB10

DB9

DB8

DB2

DB1

DB0 (LSB)

17

VDD

Positive Supply, +5 V ± 5%.

18

AGND

Analog Ground. Ground reference for track/hold, reference and DAC.

19

REF OUT Voltage Reference Output. The internal 3 V reference is provided at this pin. The external load capability is 500 µA.

20

VIN

Analog Input. The analog input range is ± 3 V for the AD7870, ± 10 V for the AD7876 and 0 V to +5 V for the AD7875.

21

VSS

Negative Supply, –5 V ± 5%.

22

12/8/CLK Three Function Input. Defines the data format and serial clock format. With this pin at +5 V, the output data for-

mat is 12-bit parallel only. With this pin at 0 V, either byte or serial data is available and SCLK is not continuous.

With this pin at –5 V, either byte or serial data is again available but SCLK is now continuous.

23

CONVST Convert Start. A low to high transition on this input puts the track/hold into its hold mode and starts conversion.

This input is asynchronous to the CLK input.

24

CS

Chip Select. Active low logic input. The device is selected when this input is active. With CONVST tied low, a new

conversion is initiated when CS goes low.

DIP and SOIC2

PIN CONFIGURATIONS1

PLCC2

1PIN CONFIGURATIONS ARE THE SAME FOR

THE AD7875 AND AD7876.

2THE AD7870 AND AD7875 ARE AVAILABLE IN

DIP AND PLCC; THE AD7870A IS AVAILABLE IN

PLASTIC DIP; THE AD7875 AND AD7876 ARE

AVAILABLE IN SOIC AND DIP.

–6–

REV. B

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