AD7875KN 查看數據表（PDF） - Analog Devices

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AD7875KN

LC2MOS Complete, 12-Bit, 100 kHz, Sampling ADCs

Analog Devices 

AD7870/AD7875/AD7876

2

Figure 12. Mode 2 Timing Diagram, Byte or Serial Read

The Mode 2 timing diagram for byte and serial data is shown in

Figure 12. For two-byte data read, the lower byte (DB0–DB7)

has to be accessed first since HBEN must be low to start con-

version. The ADC behaves like slow memory for this first read,

but the second read to access the upper byte of data is a normal

read. Operation of the serial functions is identical between

Mode 1 and Mode 2. The timing diagram of Figure 12 shows

both a noncontinuously and a continuously running SCLK

(dashed line).

DYNAMIC SPECIFICATIONS

The AD7870 and AD7875 are specified and 100% tested for

dynamic performance specifications as well as traditional dc

specifications such as integral and differential nonlinearity. Al-

though the AD7876 is not production tested for ac parameters,

its dynamic performance is similar to the AD7870 and AD7875.

The ac specifications are required for signal processing applica-

tions such as speech recognition, spectrum analysis and high

speed modems. These applications require information on the

ADC’s effect on the spectral content of the input signal. Hence,

the parameters for which the AD7870 and AD7875 are speci-

fied include SNR, harmonic distortion, intermodulation distor-

tion and peak harmonics. These terms are discussed in more

detail in the following sections.

Signal-to-Noise Ratio (SNR)

SNR is the measured signal-to-noise ratio at the output of the

ADC. The signal is the rms magnitude of the fundamental.

Noise is the rms sum of all the nonfundamental signals up to

half the sampling frequency (FS/2) excluding dc. SNR is depen-

dent upon the number of quantization levels used in the digiti-

zation process; the more levels, the smaller the quantization

noise. The theoretical signal-to-noise ratio for a sine wave input

is given by

SNR = (6.02N + 1.76) dB

(1)

where N is the number of bits. Thus for an ideal 12-bit con-

verter, SNR = 74 dB.

sine-wave signal of very low distortion to the VIN input which is

sampled at a 100 kHz sampling rate. A Fast Fourier Transform

(FFT) plot is generated from which the SNR data can be ob-

tained. Figure 13 shows a typical 2048 point FFT plot of the

AD7870KN/AD7875KN with an input signal of 25 kHz and a

sampling frequency of 100 kHz. The SNR obtained from this

graph is 72.6 dB. It should be noted that the harmonics are

taken into account when calculating the SNR.

Figure 13. FFT Plot

Effective Number of Bits

The formula given in (1) relates SNR to the number of bits.

Rewriting the formula, as in (2), it is possible to get a measure

of performance expressed in effective number of bits (N).

N = SNR – 1.76

(2)

6.02

The effective number of bits for a device can be calculated di-

rectly from its measured SNR.

REV. B

–11–

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