AD7798BRU 查看數據表（PDF） - Analog Devices

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AD7798BRU

3 V/5 V/ CMOS/ 500 uA Signal Conditioning ADC

Analog Devices 

AD7798/AD7799

Preliminary Technical Information

Table 14. IO Register Bit Designations

Bit Location Bit Name

Description

IO7

0

This bit must be programmed with a Logic 0 for correct operation.

IO6

IOEN

Configures the pins AIN3(+)/P1 and AIN3(−)/P2 as analog input pins or digital output pins.

When this bit is set, the pins are configured as digital output pins P1 and P2.

When this bit is cleared, these pins are configured as analog input pins AIN3(+) and AIN3(−).

IO5−IO4

IO2DAT−IO1DAT

P1/P2 Data.

When IOEN is set, the data for the digital output Pins P1 and P2 is written to Bits IO2DAT and

IO1DAT.

IO3−IO0

0

These bits must be programmed with a Logic 0 for correct operation.

OFFSET REGISTER

(RS2, RS1, RS0 = 1, 1, 0; Power-On/Reset = 0x8000(AD7798)/ 0x800000(AD7799))

Each analog input channel has a dedicated offset register that holds the offset calibration coefficient for the channel. This register is 16 bits

wide on the AD7798 and 24 bits wide on the AD7799 and, its power-on/reset value is 8000(00) hex. The offset register is used in conjunct-

ion with its associated full-scale register to form a register pair. The power-on-reset value is automatically overwritten if an internal or

system zero-scale calibration is initiated by the user. The offset register is a read/write register. However, the AD7798/AD7799 must be in

idle mode or power-down mode when writing to the offset register.

FULL-SCALE REGISTER

(RS2, RS1, RS0 = 1, 1, 1; Power-On/Reset = 0x5XXX(AD7798)/ 0x5XXX00(AD7799))

The full-scale register is a 16-bit register on the AD7798 and a 24-bit register on the AD7799. The full-scale register holds the full-scale

calibration coefficient for the ADC. The AD7798/AD7799 has 3 full-scale registers, each channel having a dedicated full-scale register.

The full-scale registers are read/write registers, However, when writing to the full-scale registers, the ADC must be placed in power-down

mode or idle mode. These registers are configured on power-on with factory-calibrated full-scale calibration coefficients, the calibration

being performed at Gain=1. Therefore, every device will have different default coefficients. The coefficients are different depending on

whether the internal reference or an external reference is selected. The default value will be automatically overwritten if an internal or

system full-scale calibration is initiated by the user, or the full-scale register is written to.

Pr.E 10/04 | Page 18 of 28

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