AD7194 查看數據表（PDF） - Analog Devices
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AD7194 Datasheet PDF : 56 Pages
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AD7194
SPECIFICATIONS
AVDD = 3 V to 5.25 V, DVDD = 2.7 V to 5.25 V, AGND = DGND = 0 V; REFINx(+) = +2.5 V or AVDD, REFINx(−) = AGND,
MCLK = 4.92 MHz, TA = TMIN to TMAX, unless otherwise noted.
Table 1.
Parameter
Min
ADC
Output Data Rate
4.7
1.17
1.56
No Missing Codes2
24
24
Resolution
RMS Noise and Output
Data Rates
Integral Nonlinearity
Gain = 12
Gain > 1
Offset Error4, 5
Offset Error Drift vs.
Temperature
Gain Error4
Gain Drift vs.
Temperature
Power Supply Rejection
95
Common-Mode Rejection
@ DC
@ DC
105
@ 50 Hz, 60 Hz2
120
@ 50 Hz2
120
@ 60 Hz2
120
@ 50 Hz2
115
@ 60 Hz2
115
Typ
Max
4800
1200
1600
±2
±10
±2
±15
±5
±30
±15
±30
±150/gain
±1
±0.5
±150/gain
±5
±5
±0.001
−0.4
±0.003
±0.005
±1
90
110
110
120
Unit
Test Conditions/Comments1
Hz
Chop disabled
Hz
Chop enabled, sinc4 filter
Hz
Chop enabled, sinc3 filter
Bits
FS[9:0]3 > 1, sinc4 filter
Bits
FS[9:0]3 > 4, sinc3 filter
See the RMS Noise and Resolution section
See the RMS Noise and Resolution section
ppm of FSR
ppm of FSR
ppm of FSR
ppm of FSR
μV
μV
μV
nV/°C
AVDD = 5 V
AVDD = 3 V
AVDD = 5 V
AVDD = 3 V
Chop disabled
Chop enabled, AVDD = 5 V
Chop enabled, AVDD = 3 V
Gain = 1 to 16; chop disabled
nV/°C
nV/°C
%
%
%
%
ppm/°C
Gain = 32 to 128; chop disabled
Chop enabled
AVDD = 5 V, gain = 1, TA = 25°C (factory
calibration conditions)
Gain = 128, before full-scale calibration
(see Table 27)
Gain > 1, after internal full-scale
calibration, AVDD ≥ 4.75 V
Gain > 1, after internal full-scale
calibration, AVDD < 4.75 V
dB
Gain = 1, VIN = 1 V
dB
Gain > 1, VIN = 1 V/gain
dB
Gain = 1, VIN = 1 V
dB
Gain > 1, VIN = 1 V/gain
dB
10 Hz output data rate, 50 Hz ± 1 Hz,
60 Hz ± 1 Hz
dB
50 Hz output data rate, 50 Hz ± 1 Hz
dB
60 Hz output data rate, 60 Hz ± 1 Hz
dB
Fast settling, FS[9:0]3 = 6, average by 16,
50 Hz ± 1 Hz
dB
Fast settling, FS[9:0]3 = 5, average by 16,
60 Hz ± 1 Hz
Rev. 0 | Page 3 of 56
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