AD5626BRMZ 查看數據表（PDF） - Analog Devices

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AD5626BRMZ

5 V, 12-Bit nanoDAC, Serial Interface in MSOP and LFCSP Packages

Analog Devices 

AD5626

5.0

ΔVFS ≤ 1 LSB

DATA = 0xFFF

TA = 25°C

4.8

4.6

4.4

PROPER OPERATION

WHEN VDD SUPPLY

VOLTAGE IS ABOVE

CURVE

4.2

4.0

0.01

0.1

1

10

OUTPUT LOAD CURRENT (mA)

Figure 11. Minimum Supply Voltage vs. Load

2.11

0x7FF 0x800

2.10

0x800 0x7FF

2.09

2.08

2.07

2.06

2.05

2.04

2.03

0

0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0

TIME (ns)

Figure 12. Midscale DAC Glitch Performance

OUTPUT 2

SOURCE VERTICLE SCALE OFFSET HORIZONTAL SCALE POSITION

CH2

1.00V/DIV

2.90V 50.0µs/DIV

105.758µs

Figure 13. Large Signal Settling Time

LDAC 1

OUTPUT 2

SOURCE VERTICLE SCALE OFFSET HORIZONTAL SCALE POSITION

CH1

2.00V/DIV

–1.95V 5.0µs/DIV

22.725µs

CH2

200mV/DIV

3.9875mV 5.0µs/DIV

22.725µs

Figure 14. Rise Time Detail

LDAC 1

2

OUTPUT

SOURCE VERTICLE SCALE OFFSET HORIZONTAL SCALE POSITION

CH1

2.00V/DIV

–1.95V 5.0µs/DIV

22.725µs

CH2

200mV/DIV

87.6mV 5.0µs/DIV

22.725µs

Figure 15. Fall Time Detail

0.20

+85°C

+25°C

0.15

–40°C

0.10

0.05

0

–0.05

–0.10

VDD = 5V

–0.15

0 500 1000

1500

2000 2500

CODE

3000

3500

4000

Figure 16. Integral Linearity Error vs. Digital Code

Rev. 0 | Page 8 of 20

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