3
VDD = +15V
VSS = –15V
2
REFAGND = 0V
POSITIVE INL
TA = +25؇C
1
0
NEGATIVE INL
–1
–2
–3
2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
REFIN VOLTAGE – V
TPC 7. AD5531 Typical INL Error vs. Reference Voltage
0
–0.5
VDD = +15V
VSS = –15V
REFIN = +5V
REFAGND = 0V
–1.0
–1.5
–2.0
–2.5
–40
–20
0
20
40
60
80
TEMPERATURE – ؇C
TPC 8. Typical Full-Scale and Offset Error
vs. Temperature
1.50
1.45
+85؇C
1.40
1.35
+25؇C
–40؇C
1.30
1.25
1.20
10
11
12
13
14
15
16
17
VDD/VSS – V
TPC 9. IDD vs. VDD / VSS
AD5530/AD5531
0.03
–40؇C
0.02
+25؇C +85؇C
0.01
0
10
11
12
13
14
15
16
17
SUPPLY VOLTAGE – V
TPC 10. IDD in Power-Down vs. Supply
12
8
4
0
–4
–8
–12
0
5 s/div
VDD = +15V
VSS = –15V
REFIN = +5V
REFAGND = 0V
TA = +25؇C
TIME – s
TPC 11. Settling Time
0
–0.02
–0.04
–0.06
–0.08
–0.10
–0.12
–0.14
–0.16
TIME – 750ns/DIV
VDD = +15V
VSS = –15V
REFIN = +5V
REFAGND = 0V
TA = +25؇C
TPC 12. Typical Digital-to-Analog Glitch Impulse
REV. 0
–9–