A1020B-2PQ80B 查看數據表（PDF） - Actel Corporation

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A1020B-2PQ80B

ACT™ 1 Series FPGAs

Actel Corporation 

Sequential Timing Characteristics

Flip-Flops and Latches

D

PRE

Q

E

CLK

CLR

(Positive edge triggered)

D1

CLK

E

Q

PRE, CLR

tSUD

tHD

tWCLKA

tSUENA

tCO

tA

tRS

tWASYN

Note: D represents all data functions involving A, B, S for multiplexed flip-flops.

1-296

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