7C187-15 查看數據表（PDF） - Cypress Semiconductor
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7C187-15 Datasheet PDF : 9 Pages
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CY7C187
Switching Waveforms
Read Cycle No. 2[10, 12]
tRC
CE
DATA OUT
tACE
tLZCE
HIGH IMPEDANCE
DATA VALID
tHZCE
HIGH
IMPEDANCE
VCC
SUPPLY
CURRENT
tPU
50%
tPD
50%
Write Cycle No. 1 (WE Controlled)[11]
ADDRESS
CE
tSA
WE
DATA IN
tWC
tSCE
tAW
tPWE
tSD
DATA VALID
tHA
tHD
DATA OUT
DATA UNDEFINED
tHZWE
tLZWE
HIGH IMPEDANCE
Write Cycle No. 2 (CE Controlled)[11, 13]
tWC
ADDRESS
tSA
CE
tSCE
tAW
tHA
tPWE
WE
ICC
ISB
C187–7
C187–8
DATA IN
tSD
tHD
DATA VALID
DATA OUT
HIGH IMPEDANCE
Notes:
12. Address valid prior to or coincident with CE transition LOW.
13. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
C187–9
Document #: 38-05044 Rev. **
Page 5 of 9
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