74LVC1G74GD 查看數據表（PDF） - NXP Semiconductors.
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74LVC1G74GD Datasheet PDF : 25 Pages
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NXP Semiconductors
74LVC1G74
Single D-type flip-flop with set and reset; positive edge trigger
11. Dynamic characteristics
Table 9. Dynamic characteristics
Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 10.
Symbol Parameter
Conditions
40 C to +85 C
Min Typ[1] Max
tpd
propagation delay CP to Q, Q; see Figure 8
[2]
VCC = 1.65 V to 1.95 V
1.5 6.0 13.4
VCC = 2.3 V to 2.7 V
1.0 3.5 7.1
VCC = 2.7 V
1.0 3.5 7.1
VCC = 3.0 V to 3.6 V
1.0 3.5 5.9
VCC = 4.5 V to 5.5 V
1.0 2.5 4.1
SD to Q, Q; see Figure 9
[2]
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
RD to Q, Q; see Figure 9
1.5
1.0
1.0
1.0
1.0
[2]
6.0 12.9
3.5 7.0
3.5 7.0
3.0 5.9
2.5 4.1
tW
pulse width
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
CP HIGH or LOW;
see Figure 8
1.5 5.0 12.9
1.0 3.5 7.0
1.0 3.5 7.0
1.0 3.0 5.9
1.0 2.5 4.1
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
SD and RD LOW;
see Figure 9
6.2
-
-
2.7
-
-
2.7
-
-
2.7 1.3
-
2.0
-
-
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 2.7 V
VCC = 3.0 V to 3.6 V
VCC = 4.5 V to 5.5 V
6.2
-
-
2.7
-
-
2.7
-
-
2.7 1.6
-
2.0
-
-
40 C to +125 C Unit
Min
Max
1.5
13.4 ns
1.0
7.1 ns
1.0
7.1 ns
1.0
5.9 ns
1.0
4.1 ns
1.5
12.9 ns
1.0
7.0 ns
1.0
7.0 ns
1.0
5.9 ns
1.0
4.1 ns
1.5
12.9 ns
1.0
7.0 ns
1.0
7.0 ns
1.0
5.9 ns
1.0
4.1 ns
6.2
-
ns
2.7
-
ns
2.7
-
ns
2.7
-
ns
2.0
-
ns
6.2
-
ns
2.7
-
ns
2.7
-
ns
2.7
-
ns
2.0
-
ns
74LVC1G74
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 12 — 2 April 2013
© NXP B.V. 2013. All rights reserved.
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