NXP Semiconductors
74LVC1G32
Single 2-input OR gate
6. Pinning information
6.1 Pinning
74LVC1G32
74LVC1G32
B1
6 VCC
B1
A2
GND 3
5 VCC
4Y
001aab640
A2
5 n.c.
GND 3
4Y
001aab641
Transparent top view
Fig 4. Pin configuration SOT353-1 Fig 5. Pin configuration SOT886
and SOT753
74LVC1G32
B1
A2
6 VCC
5 n.c.
GND 3
4Y
001aaf000
Transparent top view
Fig 6. Pin configuration SOT891
6.2 Pin description
Table 3.
Symbol
B
A
GND
Y
n.c.
VCC
Pin description
Pin
SOT353-1/SOT753
1
2
3
4
-
5
SOT886/SOT891
1
2
3
4
5
6
7. Functional description
Description
data input
data input
ground (0 V)
data output
not connected
supply voltage
Table 4.
Input
A
L
L
H
H
Function table[1]
B
L
H
L
H
[1] H = HIGH voltage level; L = LOW voltage level
Output
Y
L
H
H
H
74LVC1G32_6
Product data sheet
Rev. 06 — 2 August 2007
© NXP B.V. 2007. All rights reserved.
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