74HC190PW 查看數據表（PDF） - Philips Electronics

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74HC190PW

Presettable synchronous BCD decade up/down counter

Philips Electronics 

Philips Semiconductors

Presettable synchronous BCD decade

up/down counter

AC WAVEFORMS

Product specification

74HC/HCT190

(1) HC : VM = 50%; VI = GND to VCC.

HCT : VM = 1.3 V; VI = GND to 3 V.

Fig.10 Waveforms showing the clock (CP) to

output (Qn) propagation delays, the clock

pulse width and the maximum clock pulse

frequency.

(1) HC : VM = 50%; VI = GND to VCC.

HCT : VM = 1.3 V; VI = GND to 3 V.

Fig.11 Waveforms showing the clock and count

enable inputs (CP, CE) to ripple clock

output (RC) propagation delays.

(1) HC : VM = 50%; VI = GND to VCC.

HCT : VM = 1.3 V; VI = GND to 3 V.

Fig.12 Waveforms showing the input (Dn) to output

(Qn) propagation delays.

(1) HC : VM = 50%; VI = GND to VCC.

HCT : VM = 1.3 V; VI = GND to 3 V.

Fig.13 Waveforms showing the input (PL) to output

(Qn) propagation delays.

(1) HC :

VM = 50%;

VI = GND to

VCC.

HCT :

VM = 1.3 V;

VI = GND to

3 V.

(1) HC : VM = 50%; VI = GND to VCC.

HCT : VM = 1.3 V; VI = GND to 3 V.

Fig.14 Waveforms showing the up/down count

input (U/D) to terminal count and ripple

clock output (TC, RC) propagation delays.

Fig.15 Waveforms showing the parallel load input

(PL) pulse width, removal time to clock (CP)

and the output (Qn) transition times.

December 1990

12

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