74F433 查看數據表（PDF） - Fairchild Semiconductor

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74F433

First-In First-Out (FIFO) Buffer Memory

Fairchild Semiconductor 

Unit Loading/Fan Out

Pin Names

Description

PL

CPSI

IES

TTS

MR

OES

TOP

TOS

CPSO

OE

D0–D3

DS

Q0–Q3

QS

IRF

ORE

Block Diagram

Parallel Load Input

Serial Input Clock

Serial Input Enable

Transfer to Stack Input

Master Reset

Serial Output Enable

Transfer Out Parallel

Transfer Out Serial

Serial Output Clock

Output Enable

Parallel Data Inputs

Serial Data Input

Parallel Data Outputs

Serial Data Output

Input Register Full

Output Register Empty

U.L.

HIGH/LOW

1.0/0.66

1.0/0.66

1.0/0.66

1.0/0.66

1.0/0.66

1.0/0.66

1.0/0.66

1.0/0.66

1.0/0.66

1.0/0.66

1.0/0.66

1.0/0.66

285/10

285/10

20/5

20/5

Input IIH/IIL

Output IOH/IOL

20 µA/400 µA

20 µA/400 µA

20 µA/400 µA

20 µA/400 µA

20 µA/400 µA

20 µA/400 µA

20 µA/400 µA

20 µA/400 µA

20 µA/400 µA

20 µA/400 µA

20 µA/400 µA

20 µA/400 µA

5.7 mA/16 mA

5.7 µA/16 mA

400 µA/8 mA

400 µA/8 mA

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