74F164N 查看數據表（PDF） - Philips Electronics
零件编号
产品描述 (功能)
生产厂家
74F164N Datasheet PDF : 10 Pages
| |||
Philips Semiconductors
8-bit serial-in parallel-out shift register
Product specification
74F164
FEATURES
• Gated serial data inputs
• Typical shift frequency of 100MHz
• Asynchronous Master Reset
• Buffered clock and data inputs
• Fully synchronous data transfer
• Industrial temperature range available (–40 to +85 °C)
PIN CONFIGURATION
Dsa 1
Dsb 2
Q0 3
Q1 4
Q2 5
Q3 6
14 VCC
13 Q7
12 Q6
11 Q5
10 Q4
9 MR
DESCRIPTION
The 74F164 is an 8-bit edge-triggered shift register with serial data
entry and an output from each of the eight stages. Data is entered
through one of two inputs (Dsa, Dsb); either input can be used as an
active High enable for data entry through the other input. Both inputs
must be connected together or an unused input must be tied High.
Data shifts one place to the right on each Low-to-High transition of
the clock (CP) input, and enters into Q0 the logical AND of the two
data inputs (Dsa, Dsb) that existed one setup time before the rising
edge. A Low level on the Master Reset (MR) input overrides all
other inputs and clears the register asynchronously, forcing all
outputs Low.
TYPE
74F164
GND 7
8 CP
SF00717
TYPICAL fmax
100MHz
TYPICAL SUPPLY
CURRENT (TOTAL)
33 mA
ORDERING INFORMATION
DESCRIPTION
14-pin plastic DIP
ORDER CODE
COMMERCIAL RANGE
VCC = 5 V ±10%, Tamb = 0 to +70 °C
74F164N
INDUSTRIAL RANGE
VCC = 5 V ±10%, Tamb = –40 to +85 °C
I74F164N
DRAWING
NUMBER
SOT27-1
14-pin plastic SO
74F164D
I74F164D
SOT108-1
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS
DESCRIPTION
74F (U.L.)
HIGH / LOW
Dsa, Dsb
Data inputs
1.0 / 1.0
CP
Clock pulse input (active rising edge)
1.0 / 1.0
MR
Master reset input (active-Low)
1.0 / 1.0
Q0 – Q7
Data outputs
50 / 33
One (1.0) FAST unit load is defined as: 20 µA in the High state and 0.6 mA in the Low state.
LOAD VALUE
HIGH / LOW
20 µA / 0.6 mA
20 µA / 0.6 mA
20 µA / 0.6 mA
1.0 mA / 20 mA
LOGIC SYMBOL
1
2
8
CP
Dsa Dsb
9
MR
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
3 4 5 6 10 11 12 13
VCC = Pin 14
GND = Pin 7
SF00713
IEC/IEEE SYMBOL
SRG8
8
C1/→
9
R
1
&
2
1D
3
4
5
6
10
11
12
13
SF00714
2000 Dec 18
2
853-0348 25264
Share Link: 