74AC161B 查看數據表（PDF） - STMicroelectronics
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74AC161B Datasheet PDF : 12 Pages
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74AC161
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf =3 ns)
Symb ol
Parameter
tPLH Propagation Delay Time
tPHL CK to Q
tPLH Propagation Delay Time
tPHL CK to CARRY OUT
tPLH Propagation Delay Time
tPHL TE to CARRY OUT
tPHL Propagation Delay Time
CLR to Q
tPHL Propagation Delay Time
CLR to CARRY OUT
twL CLR pulse Width, LOW
(LOAD)
tw CK pulse Width
HIGH or LOW
ts Setup Time HIGH or LOW
(INPUT to CLOCK)
th Hold Time HIGH or LOW
(INPUT to CLOCK)
ts Setup Time HIGH or LOW
(CLEAR to CLOCK)
th Hold Time HIGH or LOW
(CLEAR to CLOCK)
ts Setup Time HIGH or LOW
(PE or TE to CLOCK)
th Hold Time HIGH or LOW
(PE or TE to CLOCK)
tREM Recovery Time
CLR to CLOCK
fMAX Maximum Clock Frequency
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5V ± 0.5V
T est Con ditio n
VCC
(V)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
3.3(*)
5.0(**)
Valu e
TA = 25 oC
-40 to 85 oC
Min. T yp. Max. Min. Max.
7.0 12.0
13.0
5.0 9.0
10.0
8.5 14.0
15.0
6.0 10.0
11.0
5.5 9.5
11.0
3.5 6.5
7.5
6.5 12.0
13.0
5.5 9.0
10.0
7.0 12.0
13.0
5.5 9.5
10.0
3.0 5.5
7.5
2.5 4.5
6.0
2.0 3.5
4.0
2.0 3.0
3.5
4.0 13.5
16.0
1.5 8.5
10.5
-1.0 -1.0
0.5
-0.5 0.5
1.0
3.0 11.5
14.0
2.0 7.5
8.5
-2.5 0
0
-2.0 0.5
1.0
3.0 6.0
7.0
2.0 4.5
5.0
-3.5 0
0
-2.0 0
0.5
-1.0 0
0.5
-0.5 0.5
1.0
70 110
60
110 165
95
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MHz
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
Test Conditions
VCC
(V)
Valu e
TA = 25 oC
-40 to 85 oC
Min. T yp. Max. Min. Max.
Unit
CIN Input Capacitance
5.0
4.5
pF
CPD Power Dissipation
5.0
fIN = 10 MHz
45
pF
Capacitance (note 1)
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/n(per circuit)
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