MCZ33989EG 查看數據表（PDF） - Freescale Semiconductor

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MCZ33989EG

System Basis Chip with High-Speed CAN Transceiver

Freescale Semiconductor 

INTERNAL BLOCK DIAGRAM

VSUP

HS1

L0

L1

L2

L3

TX

RX

CAN H

CAN L

INTERNAL BLOCK DIAGRAM

VSUP Monitor Dual

Voltage Regulator

VDD1 Monitor

HS1 Control

Programmable

Wake-Up Inputs

Oscillator

Interrupt

Watchdog

Reset

Mode Control

High Speed

1.0 MB/s CAN

Physical

Interface

V2

SPI

Interface

V2CTRL

V2

VDD1

INT

WD

RST

CS

SCLK

MOSI

MISO

GND

Figure 2. 33989 Simplified Internal Block Diagram

33989

2

Analog Integrated Circuit Device Data

Freescale Semiconductor

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