MT4C1M16E5DJ-6S 查看數據表（PDF） - Micron Technology
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MT4C1M16E5DJ-6S Datasheet PDF : 24 Pages
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RAS#
V
V
IH
IL
CASL#/CASH#
V
V
IH
IL
ADDR
V
V
IH
IL
WE#
V
V
IH
IL
DQ VVOOHL
OE#
V
V
IH
IL
READ CYCLE
(with WE#-controlled disable)
tCRP
tRCD
tCSH
tCAS, tCLCH
tASR
tRAD
tRAH
ROW
tAR
tASC
tCAH
tRCS
COLUMN
OPEN
tAA
tRAC
tCAC
tCLZ
tOE
16Mb: 1 MEG x16
EDO DRAM
tCP
tASC
tRCH
tWPZ
COLUMN
tRCS
tWHZ
VALID DATA
tOD
tCLZ
OPEN
DON’T CARE
UNDEFINED
TIMING PARAMETERS
SYMBOL
tAA
tAR
tASC
tASR
tCAC
tCAH
tCAS
tCLCH
tCLZ
tCP
tCRP
-5
MIN
MAX
25
38
0
0
13
8
8
10,000
5
0
8
5
-6
MIN
MAX
30
45
0
0
15
10
10
10,000
5
0
10
5
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
SYMBOL
tCSH
tOD
tOE
tRAC
tRAD
tRAH
tRCD
tRCH
tRCS
tWHZ
tWPZ
MIN
38
0
9
9
11
0
0
0
10
-5
MAX
12
12
50
12
MIN
45
0
12
10
14
0
0
0
10
-6
MAX
15
15
60
15
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
1 Meg x 16 EDO DRAM
D52_B.p65 – Rev. B; Pub. 3/01
19
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2001, Micron Technology, Inc
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