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SN260 查看數據表(PDF) - STMicroelectronics

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产品描述 (功能)
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SN260
ST-Microelectronics
STMicroelectronics 
SN260 Datasheet PDF : 88 Pages
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SN260
Functional description
The primary features of the MAC are:
CRC generation, appending, and checking
Hardware timers and interrupts to achieve the MAC symbol timing
Automatic preamble, and SFD pre-pended to a TX packet
Address recognition and packet filtering on received packets
Automatic acknowledgement transmission
Automatic transmission of packets from memory
Automatic transmission after backoff time if channel is clear (CCA)
Automatic acknowledgement checking
Time stamping of received and transmitted messages
Attaching packet information to received packets (LQI, RSSI, gain, time stamp, and
packet status)
IEEE 802.15.4-2003 timing and slotted/unslotted timing
5.4
Packet trace interface (PTI)
The SN260 integrates a true PHY-level PTI for effective network-level debugging. This two-
signal interface monitors all the PHY TX and RX packets (in a non-intrusive manner)
between the MAC and baseband modules. It is an asynchronous 500kbps interface and
cannot be used to inject packets into the PHY/MAC interface. The two signals from the
SN260 are the frame signal (PTI_EN) and the data signal (PTI_DATA). The PTI is supported
by InSight Desktop.
5.5
16-bit microprocessor
The SN260 integrates the XAP2b microprocessor developed by Cambridge Consultants
Ltd., making it a true network processor solution. The XAP2b is a 16-bit Harvard
architecture processor with separate program and data address spaces. The word width is
16 bits for both the program and data sides.
The standard XAP2 microprocessor and accompanying software tools have been enhanced
to create the XAP2b microprocessor used in the SN260. The XAP2b adds data-side byte
addressing support to the XAP2 allowing for more productive usage of RAM and optimized
code.
The XAP2b clock speed is 12MHz. When used with the EmberZNet stack, firmware is
loaded into Flash memory over the air or by a serial link using a built-in bootloader in a
reserved area of the Flash. Alternatively, firmware may be loaded via the SIF interface with
the assistance of RAM-based utility routines also loaded via SIF.
5.6
Embedded memory
The SN260 contains embedded Flash and RAM memory for firmware storage and
execution. In addition it partitions a portion of the Flash for simulated EEPROM and token
storage.
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