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HT45FM03B(2009) 查看數據表(PDF) - Holtek Semiconductor

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HT45FM03B
(Rev.:2009)
Holtek
Holtek Semiconductor 
HT45FM03B Datasheet PDF : 83 Pages
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HT45FM03B
Programming Considerations
When configured to run in the timer mode, the internal
system clock is used as the timer clock source and is
therefore synchronized with the overall operation of the
microcontroller. In this mode, when the appropriate
timer register is full, the microcontroller will generate an
internal interrupt signal directing the program flow to the
respective internal interrupt vector. For the pulse width
measurement mode, the internal system clock is also
used as the timer clock source but the timer will only run
when the correct logic condition appears on the external
timer input pin. As this is an external event and not syn-
chronised with the internal timer clock, the
microcontroller will only see this external event when the
next timer clock pulse arrives. As a result there may be
small differences in measured values requiring pro-
grammers to take this into account during programming.
The same applies if the timer is configured to be in the
event counting mode which again is an external event
and not synchronised with the internal system or timer
clock.
When the Timer/Event Counter is read or if data is writ-
ten to the registers, the clock is inhibited to avoid errors,
however as this may result in a counting error, this
should be taken into account by the programmer. Care
must be taken to ensure that the timers are properly in-
itialised before using them for the first time. The associ-
ated timer enable bits in the interrupt control register
must be properly set otherwise the internal interrupt as-
sociated with the timer will remain inactive. The edge
select, timer mode and clock source control bits in timer
control register must also be correctly set to ensure the
timer is properly configured for the required application.
It is also important to ensure that an initial value is first
loaded into the timer register before the timer is
switched on; this is because after power-on the initial
value of the timer register is unknown. After the timer
has been initialised the timer can be turned on and off by
controlling the enable bit in the timer control register.
Note that setting the timer enable bit high to turn the
timer on, should only be executed after the timer mode
bits have been properly setup. Setting the timer enable
bit high together with a mode bit modification, may lead
to improper timer operation if executed as a single timer
control register byte write instruction.
When the Timer/Event counter overflows, its corre-
sponding interrupt request flag in the interrupt control
register will be set. If the timer interrupt is enabled this
will in turn generate an interrupt signal. However irre-
spective of whether the timer interrupt is enabled or not,
a Timer/Event counter overflow will also generate a
wake-up signal if the device is in a Power-down condi-
tion. This situation may occur if the Timer/Event Counter
is in the Event Counting Mode and if the external signal
continues to change state. In such a case, the
Timer/Event Counter will continue to count these exter-
nal events and if an overflow occurs the device will be
woken up from its Power-down condition. To prevent
such a wake-up from occurring, the timer interrupt re-
quest flag should first be set high before issuing the
HALT instruction to enter the Power Down Mode.
Rev. 1.00
29
December 16, 2009

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