ADAU1701 查看數據表（PDF） - Analog Devices

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ADAU1701

SigmaDSP® 28/56-Bit Audio Processor with 2ADC/4DAC

Analog Devices 

ADAU1701

34

PWR PVDD

35

A_OUT PLL_LF

36

PWR AVDD

37

PWR AGND

38

D_IN PLL_MODE0

39

D_IN PLL_MODE1

40

A_OUT CM

41

A_OUT FILTD

42

PWR AGND

43

A_OUT VOUT3

44

A_OUT VOUT2

45

A_OUT VOUT1

46

A_OUT VOUT0

47

A_OUT FILTA

48

PWR AVDD

Preliminary Technical Data

PVDD with a 100 nF capacitor.

PVDD is the 3.3 V power supply for the PLL and the auxiliary ADC’s analog

section. This should be decoupled to PGND with a 100 nF capacitor.

PLL Loop Filter connection. Two capacitors and a resistor need to be connected

to this pin as shown in the Setting Master Clock/PLL Mode section.

AVDD is a 3.3 V Analog Supply. This should be decoupled to AGND with a 100 nF

capacitor.

AGND is an analog ground pin. The AGND, DGND, and PGND pins can be tied

directly together in a common ground plane. AGND should be decoupled to an

AVDD pin with a 100 nF capacitor.

PLL_MODE0 and PLL_MODE1 set the output frequency of the master clock PLL.

See the Setting Master Clock/PLL Mode section for more details.

CM is the common mode reference. A 47 μF decoupling capacitor should be

connected between this pin and ground to reduce crosstalk between the ADCs

and DACs. The capacitor’s material is not critical.

FILTD is the DAC filter decoupling pin, which should be connected to a 10 μF

capacitor to ground. The capacitor’s material is not critical.

AGND is an analog ground pin. The AGND, DGND, and PGND pins can be tied

directly together in a common ground plane. AGND should be decoupled to an

AVDD pin with a 100 nF capacitor.

VOUT0-3 are the DAC outputs. Full-scale output voltage is 0.9 Vrms. These

outputs can be used with either active or passive output reconstruction filters.

FILTA is the ADC filter decoupling pin, which should be connected to a 10 μF

capacitor to ground. The capacitor’s material is not critical.

AVDD is a 3.3 V Analog Supply. This should be decoupled to AGND with a 100 nF

capacitor.

1 PWR = Power/Ground, A_IN = analog input, D_IN = digital input, A_OUT = analog output, D_IO = digital input/output, D/A_IO = digital/analog input/output

Rev. PrF | Page 12 of 43

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