74ABT16646CSSC 查看數據表（PDF） - Fairchild Semiconductor
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74ABT16646CSSC Datasheet PDF : 9 Pages
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Function Table
Inputs
Data I/O (Note 1)
Output Operation Mode
OE1 DIR1 CPAB1 CPBA1 SAB1 SBA1 A0–7
H
X H or L H or L X
X
H
X
X
X
X
Input
H
X
X
X
X
B0–7
Input
Isolation
Clock An Data into A Register
Clock Bn Data Into B Register
L
H
X
X
L
X
An to Bn—Real Time (Transparent Mode)
L
H
X
L
X
Input Output Clock An Data to A Register
L
H H or L X
H
X
L
H
X
H
X
A Register to Bn (Stored Mode)
Clock An Data into A Register and Output to Bn
L
L
L
L
X
X
X
X
X
L
Bn to An—Real Time (Transparent Mode)
L Output Input Clock Bn Data into B Register
L
L
X H or L X
H
L
L
X
X
H
B Register to An (Stored Mode)
Clock Bn into B Register and Output to An
H = HIGH Voltage Level
L = LOW Voltage Level
X = Immaterial
= LOW-to-HIGH Transition
Note 1: The data output functions may be enabled or disabled by various signals at the OE and DIR inputs. Data input functions are always enabled;
i.e., data at the bus pins will be stored on every LOW-to-HIGH transition of the appropriate clock inputs. Also applies to data I/O (A and B: 8-15)
and #2 control pins.
Real Time Transfer
A-Bus to B-Bus
Real Time Transfer
B-Bus to A-Bus
FIGURE 1.
Storage from
Bus to Register
FIGURE 2.
Transfer from
Register to Bus
FIGURE 3.
FIGURE 4.
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