QLX411GRX 查看數據表（PDF） - Intersil

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QLX411GRX

Quad Lane Extender

Intersil 

QLx411GRx

FIGURE 4. FUNCTIONAL DIAGRAM OF A SINGLE CHANNEL WITHIN THE QLx411GRx

Operation

The QLx411GRx is an advanced quad lane-extender for

high-speed interconnects. A functional diagram of one of

the four channels in the QLx411GRx is shown in Figure 4.

In addition to a robust equalization filter to compensate

for channel loss and restore signal fidelity, the

QLx411GRx contains unique integrated features to

preserve special signaling protocols typically broken by

other equalizers. The signal detect function is used to

mute the channel output when the equalized signal falls

below the level determined by the Detection Threshold

(DT) pin voltage. This function is intended to preserve

periods of line silence (“quiescent state” in InfiniBand

contexts). Furthermore, the output of the signal

detect/DT comparator is used as a loss of signal (LOS)

indicator to indicate the absence of a received signal.

As illustrated in Figure 4, the core of each high-speed

signal path in the QLx411GRx is a sophisticated equalizer

followed by a limiting amplifier. The equalizer

compensates for skin loss, dielectric loss, and impedance

discontinuities in the transmission channel. Each

equalizer is followed by a limiting amplification stage that

provides a clean output signal with full amplitude swing

and fast rise-fall times for reliable signal decoding in a

subsequent receiver.

Individually Adjustable Equalization Boost

Each channel in the QLx411GRx features an

independently settable equalizer for custom signal

restoration. The flexibility of this adjustable

compensation architecture enables signal fidelity to be

optimized on a channel-by-channel basis, providing

support for a wide variety of channel characteristics and

data rates ranging from 2.5Gb/s to 11.3Gb/s. Because

the boost level is externally set rather than internally

adapted, the QLx411GRx provides reliable

communication from the very first bit transmitted. There

is no time needed for adaptation and control loop

convergence. Furthermore, there are no pathological

data patterns that will cause the QLx411GRx to move to

an incorrect boost level.

FIGURE 5. GAIN PROFILE FOR VARIOUS BOOST

SETTINGS IN QLx411GRx

Control Pin Boost Setting

The connectivity of the CP pins is used to determine the

boost level of each channel. Table 1 defines the mapping

from the 2-bit CP word to the 5 possible boost levels.

TABLE 1. MAPPING BETWEEN BOOST LEVEL AND CP-

PIN CONNECTIVITY

CP[A]

CP[B]

BOOST LEVEL

25kΩ

25kΩ

0

25kΩ

Open

1

25kΩ

0Ω

2

Open

25kΩ

3

Open

Open

4

7

FN6989.1

November 19, 2009

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